Re: edk peripheral communication

> I have constructed these blocks and the memory ****tion is working
> however i cannot get the 2 peripherals to communicate with each other
> is there anything i'm overlooking?
>
> Has anyone done anything similar to this?

	If you want your peripherals to communicate you will need to connect them
 
together. In order to do this they must have some ****ts. The specification
 
of those ****ts is up to you but they must appear in the VHDL/Verilog code 

(obviously) and also in the MPD file for your peripheral. The ****ts will  
then appear in XPS, in the "****ts" display mode. You can make the ****ts  
external (as you would usually do) but you can also connect ****ts  
internally simply by connecting them to the same net, just assign unique  
net names and you're set.
	If your ****t uses a standard xilinx bus spec (like MCH/XCL initiator and 

target) it will appear in the main window (provided the MPD file is  
correct) and you can connect it by clicking on the little wires and  
triangles XPS displays, just like you would connect a peripheral to the  
bus.

	For instance I created a peripheral that must access data from RAM at  
high throughput. I gave it a MCH initiator interface and connected this to
 
the mch_sdram controller using the GUI. I had to hack the files a bit to  
get the correct syntax but it's easy. You have already done this if one of
 
your peripherals has an interrupt that you connected to opb_intc, it's the
 
same.

	The interface sucks, though, you might want to edit the MHS file directly
 
and do some happy copypasting.