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Electronic Equipment > FPGA > arithmetic prob...
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arithmetic problem

by Thorsten Kiefer <webmaster@[EMAIL PROTECTED] > Jun 29, 2008 at 08:30 PM

Hi,
the following code :

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.ALL;
....
rnext.addr <= std_logic_vector(unsigned(rreg.addr) + 1);
....

yields the following error :
Line 140. Expression in type conversion to std_logic_vector has 3 possible
definitions in this scope, for example, UNSIGNED and UNSIGNED.

What can I do ?

Regards
Thorsten
 




 7 Posts in Topic:
arithmetic problem
Thorsten Kiefer <webma  2008-06-29 20:30:30 
Re: arithmetic problem
Jonathan Bromley <jona  2008-06-30 08:53:18 
Re: arithmetic problem
Thorsten Kiefer <webma  2008-06-30 17:34:14 
Re: arithmetic problem
Dave <dhschetz@[EMAIL   2008-06-30 09:06:26 
Re: arithmetic problem
Andy <jonesandy@[EMAIL  2008-06-30 10:17:48 
Re: arithmetic problem
Dave <dhschetz@[EMAIL   2008-06-30 11:00:27 
Re: arithmetic problem
Brian Drummond <brian_  2008-06-30 12:17:32 

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tan12V112 Sat Aug 30 2:57:43 CDT 2008.