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Electronic Equipment > FPGA > Insert IP cores
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Insert IP cores

by Zhane <me75@[EMAIL PROTECTED] > Jul 3, 2008 at 01:48 AM

Im trying to make use of the fifo in my Spartan3E starter kit


i've added the component declaration and instantiation template as
instructed in the vho file. but im getting the following error when i
try to implement the design

ERROR:NgdBuild:604 - logical block 'FIFO' with type
'fifo_generator_v3_3' could
   not be resolved. A pin name misspelling can cause this, a missing
edif or ngc
   file, or the misspelling of a type name. Symbol
'fifo_generator_v3_3' is not
   sup****ted in target 'spartan3e'.

Ive also added "Library XilinxCoreLib;" at my top module, which refers
to the fifo component.

am I missing something?
 




 6 Posts in Topic:
Insert IP cores
Zhane <me75@[EMAIL PRO  2008-07-03 01:48:22 
Re: Insert IP cores
"Stephan van Beek&qu  2008-07-03 10:54:36 
Re: Insert IP cores
Zhane <me75@[EMAIL PRO  2008-07-03 02:44:46 
Re: Insert IP cores
"Stephan van Beek&qu  2008-07-03 13:43:53 
Re: Insert IP cores
Zhane <me75@[EMAIL PRO  2008-07-03 08:25:26 
Re: Insert IP cores
"Stephan van Beek&qu  2008-07-04 09:37:40 

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tan12V112 Thu Nov 20 20:28:15 CST 2008.