Hi All,
I've been investigating various (non-DSP, sorry!) processors and have
come across some Freescale parts with an "RNGA" (random number
generator accelerator). See, for example,
http://www.freescale.com/files/32bit/doc/white_paper/IMX31SECURITYWP.pdfhttp://tinyurl.com/4qgg3r
The most detail I can find is in section 5.5:
"The random bits are generated by clocking ****ft registers with clocks
derived from ring oscillators. The configuration of the ****ft
registers ensures statistically good data, meaning data that looks
random. The oscillators with their unknown frequencies provide the
required entropy needed to create random data."
Does anyone have a pointer to more detail in how these things work?
Any pointers or information appreciated!
Ciao,
Peter K.
PS: Suggestions for other newsgroups to ask the question in also
welcome.
--
"And he sees the vision splendid
of the sunlit plains extended
And at night the wondrous glory of the everlasting stars."