Hi
I have a simple question. I have a 16-bit register that stores me the
information about the usage of 16 registers. If a bit is set the
register is locked else its free to use. Next, I read then in a value
that wants to use one of the registers. The value is a decimal number
between 0 and 15, so I wonder if VHDL offers an easy way to convert from
decimal to binary so that I can compare then values with an AND mask.
This the thing should also be sythesizable on an XIlinx FPGA ;)
Thanks,
Klaus
