On May 23, 11:20=A0am, Klaus Thiele <Thiel...@[EMAIL PROTECTED]
> wrote:
> Hi
>
> I have a simple question. I have a 16-bit register that stores me the
> information about the usage of 16 registers. If a bit is set the
> register is locked else its free to use. Next, I read then in a value
> that wants to use one of the registers. The value is a decimal number
> between 0 and 15, so I wonder if VHDL offers an easy way to convert from
> decimal to binary so that I can compare then values with an AND mask.
> This the thing should also be sythesizable on an XIlinx FPGA ;)
>
Perhaps you should go back and rethink your question. Inside an FPGA
you only have binary logic, there is no decimal so the number you
'read in' will not be decimal.
Probably what you're trying to say is that you've got a number in the
range 0 to 15 (most likely represented inside the FPGA as a 4 bit
binary number) and you want to decode to select one of 16 different
things. In that case, Google for 4->16 decoders, de-multiplexers,
etc. You'll likely implement something like this...
process
begin
Select_This <=3D (others =3D> '0');
Select_This(Index) <=3D '1'
end process;
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