Re: Signed, Unsigned syntax issues. Please help, I'm stumped

"MikeWhy" <boat042-nospam@[EMAIL PROTECTED]
> wrote in message 
news:FsK4k.13880$co7.9937@[EMAIL PROTECTED]
> "rickman" <gnuarm@[EMAIL PROTECTED]
> wrote in message 
>
news:bdf4e73d-f1d1-460d-a92c-be0518f01f56@[EMAIL PROTECTED]
> I can see some issues. But so far, it sounds like you only want to
better 
> define assignment of signed/unsigned integer values and literal
constants. 
> Size promotion rules will cover it without fighting that battle.
>
> What other use would you have for assignment overload?
>

I second Jonathon's post.  The new fixed/floating point library is an 
excellent example of why you would want this.  While it's great that it
can 
be used with existing VHDL-93, having to put the size of the thing being 
assigned to on the right hand side just so the function can know the size
of 
the thing being assigned to really clutters up and obscures things.  The 
declaration of a signal becomes quite interesting in how to format it to 
even look intelligible to the reader.

Kevin Jennings