Re: Signed, Unsigned syntax issues. Please help, I'm stumped

On Mon, 16 Jun 2008 11:43:24 +0100, Brian Drummond wrote:

>Overload the unary "+" operator. This is commonly done in Ada for
>various purposes; I don't see why it won't work in VHDL.
>
>If so, then it ought to be possible to make 
>CTPBitCnt <= +1;
>work.
>
>subtype BitCntType is ...
>
>signal CTPBitCnt : BitCntType;
>
>function "+" (int:integer) return BitCntType is
>variable BitCnt:BitCntType := to_unsigned(int, BitCntType'length);
>begin
>    return BitCnt;
>end function "+";
>
>Offhand I don't see it working with unconstrained types like unsigned,
>which makes it less attractive. Does anyone know better?

That's exactly the problem; the function signature for an operator
overload (or any other overloaded function) does NOT take subtype
into account, but only type.  So your overloaded "+" could only
be made to target exactly one width of UNSIGNED.  Bummer.

Going the other way:

  function "+"(u: unsigned) return natural is
  begin
    return to_integer(u);
  end;

works nicely, though...
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Jonathan Bromley, Consultant

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