Re: Signed, Unsigned syntax issues. Please help, I'm stumped

On Jun 11, 10:52 am, rickman <gnu...@[EMAIL PROTECTED]
> wrote:
> On Jun 10, 5:59 pm, Andy <jonesa...@[EMAIL PROTECTED]
> wrote:
> > One more point: just try to design a fixed or floating point
> > arithmetic design with verilog!
>
> Is that a point?  What was the point?  Are you trying to say that
> users don't design arithmetic circuits in Verilog??? I am pretty sure
> that the limited work I have done in Verilog has included arithmetic.
> I must be missing your point.

My point is FIXED or FLOATING point arithmetic, not just arithmetic in
general. Verilog as a language does not pass index ranges along with
vectors into operators or functions, so verilog has no means of either
handling a user-definable data subtype that communicates the location
of binary point, or of defining operators and functions that can
operate on those subtypes automatically. Of course, verilog can do
arithmetic, but for FIXED/FLOATING, you have to manage the binary
point (and/or exponent) manually. Sometimes a little language
complexity makes the big picture a lot less complex and error prone.


Andy