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Electronic Equipment > VHDL > Re: Globally st...
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Re: Globally static expression

by "ALuPin@[EMAIL PROTECTED] " <ALuPin@[EMAIL PROTECTED] > Jun 23, 2008 at 06:57 AM

Hi Andy,

thank your for your answer.

>The "and"
>function return type is an unconstrained vector, and is defined in a
>package, so the compiler does not know how wide the vector is when it
>compiles this file,

What exactly is the unconstrained vector in the code shown ?

("cREGADDRGeneralRangeMask" has a constant definition:
  CONSTANT cREGADDRGeneralRangeMask: std_logic_vector(13 DOWNTO 0) :=
"00000000111111";)

Rgds
Andre
 




 8 Posts in Topic:
Globally static expression
"ALuPin@[EMAIL PROTE  2008-06-23 05:41:21 
Re: Globally static expression
Andy <jonesandy@[EMAIL  2008-06-23 06:13:04 
Re: Globally static expression
"ALuPin@[EMAIL PROTE  2008-06-23 06:57:49 
Re: Globally static expression
KJ <kkjennings@[EMAIL   2008-06-23 07:37:24 
Re: Globally static expression
"ALuPin@[EMAIL PROTE  2008-06-23 07:52:00 
Re: Globally static expression
KJ <kkjennings@[EMAIL   2008-06-23 09:23:42 
Re: Globally static expression
"ALuPin@[EMAIL PROTE  2008-06-24 00:55:22 
Re: Globally static expression
"ALuPin@[EMAIL PROTE  2008-06-24 01:28:50 

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tan12V112 Mon Dec 1 14:10:43 CST 2008.