by Mike Treseler <mtreseler@[EMAIL PROTECTED]
>
Jun 24, 2008 at 07:51 AM
ALuPin@[EMAIL PROTECTED]
wrote:
> I am using the Xilinx paper
> "xapp131.pdf" to build a dual clock fifo. What is your opinion about
> integrating that write pointer confirm / clear
> mechanism into the Xilinx module ?
I would prefer to use the fast clock to synchronize
the slow interface and revert to the single clock design.
> Where do you see pitfalls on
> confirming / clearing the write pointer on dual clock fifo?
Logic races.
-- Mike Treseler