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Electronic Equipment > VHDL > BIT oriented me...
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BIT oriented memory

by jack_ajack@[EMAIL PROTECTED] Jun 25, 2008 at 03:13 PM

the following code is for bit oriented memory
it has two addresses one for column and the second for row array
iam  trying to inject a SA0 fault at memory location '000' row  '000'
column but still not sure about the sytnax

mem((address_row))(address_col)) -- it might be wrong

could you advice please


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity RAM is
    ****t ( CS : in  STD_LOGIC;
           WE : in  STD_LOGIC;
           OE : in  STD_LOGIC;
           address_row : in  STD_LOGIC_VECTOR (3 downto 0);
           data : inout  STD_LOGIC;
           address_col : in  STD_LOGIC_VECTOR (3 downto 0));


Architecture behaviour of RAM is

Type RAM_array is array (0 to 7) of std_logic_vector (7 downto 0);

 Begin
 Process (address_row,address_col,Data,WE,OE,CS )
    Variable mem: ram_array;

   Begin
	Data<=3D (others =3D> =91Z=92);
		if CS=3D=920=92 then
 		  if OE=3D=920=92 then
		Data <=3D mem((address_row)(address_col));
		elsif WE=3D=920=92 then

                        If address_row=3D=94000=94 and
address_col=3D=94000=
=94
then
                        mem((address_col)(address_row))=3D=920=92;
		       elsif  mem((address_row))(address_col)):=3D Data;

   End if;
 End procegss;
End  behaviour;
 




 2 Posts in Topic:
BIT oriented memory
jack_ajack@[EMAIL PROTECT  2008-06-25 15:13:54 
Re: BIT oriented memory
Tricky <Trickyhead@[EM  2008-06-26 01:58:23 

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tan12V112 Mon Dec 1 15:04:54 CST 2008.