Vandana wrote:
> 1. Currently, in my code once i set the we(write_enable) or the
> re(read_enable) on I dont turn it off. the reason being, if i set them
> to 0 after the read/write operation, I dont see the desired data. So
> the we/re remains on even after the operation is complete. how to
> avoid this?
Write to the ram before you read it.
> 2. In cycles 45 -55 ns, I get undefined value in dout, after 55 ns, I
> again see the desired value. what is the reason for this?
You are reading before the write is finished.
> 3. This is the second testbench/vhdl code, so I have idea about the
> quality. Is it a very poor testbench?
It compiled and ran. Not bad for two days of work.
To avoid errors like this I prefer a sequential test process.
See my testbench example here.
http://mysite.verizon.net/miketreseler/
-- Mike Treseler
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