VHDL projects in emacs

Hello,
I'm FPGA designer, I work on Xilinx ISE tools (MS Windows XP).
I've started to use emacs a week ago. It looks very impressive.

But..
1. How can I organize working with projects? I have some projects
added to environment through putting their definition in .emacs file.
It looks messy for me. How can I do other way? How you do that?

2. Is there possibility to mark column region for copy/cut?

Best Regards,

Jerzy Gbur