by "Alvin Andries" <Alvin_Andries.no_spam@[EMAIL PROTECTED]
>
Dec 27, 2006 at 08:05 AM
"gomsi" <gautamsharma24@[EMAIL PROTECTED]
> wrote in message
news:1166512579.052963.4320@[EMAIL PROTECTED]
> I have a simple doubt about resetting sequence of Tap state machine
> One way of resetting TAP FSM is through trst signal. Making trst
> 1(along with TMS=1 for the time trst transitions from 0 to 1) resets
> the state machine and it enter run-test-idle mode.
>
> A other way is by asserting TMS=1 for five TCK.. But am not able to do
> it this way.. Any clues where i may be going wrong? What should be the
> value on other test signals at this time? Since in my case the TAP
> remains in test-logic-reset state
>
Asserting TSRT* = 0 (with TMS = 1) or holding TMS = 1 for 5 TCK cycles
should bring your TAP controller in Test-logic-reset state. Making TMS = 0
will then bring you into run-test-idle state.
Regards,
Alvin.
