AMD Phenom L3 cache bug explained

There was a bug detected in the L3 cache of the newly introduced AMD 
Phenom and Barcelona quad-core processors. It's apparently what's 
causing the delay of the introduction of faster versions of the Phenom & 
Opteron(so far it's only available upto 2.3Ghz). Also it's resulted in 
AMD having to reintroduce newer, faster versions of the previous 
generation Athlon X2 processors to fill the gap.

DailyTech - Understanding AMD's "TLB" Processor Bug
"How does the TLB erratum occur?  All AMD quad-core processors utilize a 
shared L3 cache.  In instances where the software utilizes nested memory 
pages, this processor will experience a race condition.  "
http://www.dailytech.com/Understanding++AMDs+TLB+Processor+Bug/article9915.htm