Re: AMD Phenom L3 cache bug explained

Ed wrote:
> At AMD's last analyst day meeting there was no mention of Z-Ram that I
> can recall. That pdf is old.

It's likely they aren't going to say too much about it until they get it 
out. Something like this will either work or not work, and they don't 
want to get too much buzz around it if it doesn't come out. But they had 
  licensed the technology back in 2006, and if it takes 2 to 3 years to 
develop it, then 2008 is just about right time to start seeing it.

> They claimed the first AMD64 K8s were capable of 8MB L2 caches but they
> never did more then 1MB per core, probably because of yields, die size,
> and the performance gains just weren't noticeable enough, their
> architecture just doesn't seem to benefit much from larger caches, even
> the new chips with L3 cache don't appear to be making any big impact.

You mean like the small impact of 10-20% drop in performance if the L3 
is reduced in speed or cut out entirely?

	Yousuf Khan