"Adam Ierymenko" <adam.ierymenko@[EMAIL PROTECTED]
> wrote in message
news:7f53d811-7dfc-404c-b6b6-996e21124e14@[EMAIL PROTECTED]
> Hey guys...
>
> I'm looking for a deep technical answer on this question from someone
> who knows something about chip design or at least chip quality
> control, technical specs, etc.
>
> I'm curious about whether undervolting can actually damage a chip. I
> know it could make it unstable, but could it actually damage the chip
> or shorten its life span (or the life span of other components)? Is
> this something to be concerned about or is it something like "yeah, it
> might shorten the theoretical life span from 100 years to 50 years"?
>
> The reason I'm asking is this comment:
>
> "Depending on the voltage your adjusting you could fry the chip by
> under-volting. Most chips these days require a few different voltages
> to run, and if you lower one, there are sometimes sneak paths where
> the logic that is not getting enough power can draw power from the I/O
> voltage, or other auxiliary voltages on the chip which can burn out IO
> and other parts since they were never designed to carry the amount of
> current drawn through the sneak path. There are usually some
> protections in place to prevent the burn out, but with millions of
> transistors on a chip it's sometimes hard to catch all of the possible
> sneak paths."
>
> Here's the context of the comment:
>
> http://forums.macrumors.com/showthread.php?p=5213018
>
> Is this really a potential issue that one would face in the normal
> life span of a computer? I would think that undervolting (keep in mind
> no overclocking here) would be much safer than overvolting/
> overclocking where I have heard fry stories. :)
>
> -Adam
>
There are a few main exposures that I can think of....
1. The N-wells are typically connected to one of the power supplies.
Which one is dependent on the design and what supplies are being used in
that circuit. If the well bias gets more than a diode drop below the
voltage that the Pfet is connected to, current will flow raising
disipation, and potentially causing latchup.
2. Some high voltage outputs may use multiple supplies and depend on
values of each to avoid overstressing...
3. Some level ****ft circuits might depend on power supply being in
tolerance..
However chips are usually designed so as not to require any power
sequencing. I can't promise that every chip in use is in fact designed
that way...
But I wouldn't worry about it particularily.
del
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