http://www.dailytech.com/Dodecacore+The+Megahertz+Race+is+Now+Officially+th=
e+Multicore+Race/article11531.htm
Hardware Dodeca-core: The Megahertz Race is Now Officially the Multi-
core Race
AMD engineers reveal details about the company's upcoming 45nm
processor roadmap, including plans for 12-core processors
"Shanghai! Shanghai!" the re****ters cry during the AMD's financial
analyst day today. Despite the fact that the company will lay off
nearly 5% of its work force this week, followed by another 5% next
month, most employees interviewed by DailyTech continue to convey an
optimistic outlook.
The next major milestone for the CPU engineers comes late this year,
with the debut of 45nm Shanghai. Shanghai, for all intents and
purposes, is nearly identical to the B3 stepping of Socket 1207
Opteron (Barcelona) ****pping today. However, where as Barcelona had
its HyperTrans****t 3.0 clock generator fused off, Shanghai will once
again attempt to get HT3.0 right.
Original roadmaps anticipated that HT3.0 would be used for socket-to-
socket communication, but also for communication to the Southbridge
controllers. Motherboard manufacturers have confirmed that this is no
longer the case, and that HT3.0 will only be used for inter-CPU
communication.
"Don't be disappointed, AMD is making up for it," hints one engineer.
Further conversations revealed that inter-CPU communication is going
to be a big deal with the 45nm refresh. The first breadcrumb comes
with a new "native six-core" Shanghai derivative, currently codenamed
Istanbul. This processor is clearly targeted at Intel's recently
announced six-core, 45nm Dunnington processor.
But ***tuple-core processors have been done, or at least we'll see the
first ones this year. The real neat stuff comes a few months after,
where AMD will finally ditch the "native-core" rhetoric. Two separate
re****ts sent to DailyTech from AMD partners indicate that Shanghai and
its derivatives will also get twin-die per package treatment.
AMD planned twin-die configurations as far back as the K8
architecture, though abandoned those efforts. The company never
explained why those processors were nixed, but just weeks later
"native quad-core" became a major marketing campaign for AMD in
anticipation of Barcelona.
A twin-die Istanbul processor could enable 12 cores in a single
package. Each of these cores will communicate to each other via the
now-enabled HT3.0 interconnect on the processor.
The rabbit hole gets deeper. Since each of these processors will
contain a dual-channel memory controller, a single-core can emulate
quad-channel memory functions by accessing the other dual-channel
memory controller on the same socket. This move is likely a
preemptive strike against Intel's Nehalem tri-channel memory
controller.
Motherboard manufacturers claim Shanghai and its many-core derivatives
will be backwards compatible with existing Socket 1207 motherboards.
However, processor-to-processor communication will downgrade to lower
HyperTrans****t frequencies on these older motherboards. The newest
1207+ motherboards will officially sup****t the HyperTrans****t 3.0
frequencies.
Shanghai is currently taped out and running Windows at AMD.
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http://blogs.zdnet.com/processors/?p=3D162
AMD can=92t get to 45nm fast enough.
A 12-core package?
If there was a bright spot in AMD=92s first quarter, it was the new PC
and graphics products that have either recently ****pped or are in the
pipeline for 2008. Barcelona, the company=92s quad-core design
manufactured using a 65nm process, bombed last year. Meanwhile, Intel
is minting millions of 45nm chips. So it=92s no surprise that AMD is
****fting to 45nm processors as quickly as possible.
During the earnings call last week, AMD executives said the 45nm
processor, code-named Shanghai, was on track and would be ****pping in
volume in the fourth quarter. By all accounts, Shanghai is largely a
=93shrink=94 of the recently-released B3 version of Barcelona, which
corrected a flaw in the original design. But Daily Tech re****ts that
AMD has more ambitious plans for the 45nm design.
Citing AMD engineers, the site says AMD will produce a six-core
version, code-named Istanbul, and then, in a reversal of its =93native-
quad-core=94 strategy of putting all cores on a single piece of silicon,
offer a two-die package with a total of 12 cores. The two processors
will be connected using AMD=92s HyperTrans****t 3.0 bus.
To be clear, this platform is designed for the server and workstation
market. Based on recent presentations, AMD will also release a 45nm
enthusiast desktop platform, code-named Leo, later this year that will
consist of triple-core and quad-core chips. Mainstream and budget
desktops, as well as business systems, will continue to use platforms
based on 65nm processors until sometime in 2009.
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http://www.gadgetell.com/tech/comment/amd-readying-12-core-45nm-processors-f=
or-late-2008/
AMD readying 12-core 45nm processors for late 2008
by David Gonzales on Apr 19, 2008 at 10:29 PM
Forget quad-core, AMD is preparing a dodeca-core chip. If you didn=92t
stay in boarding school if you need refre****ng with your greek
vocabulary, dodeca means 12, and that=92s 12 cores for you right there.
Imagine, a dozen times faster than a normal chip. But how fast does
one=92s computer ever really need to be? AMD doesn=92t seem to care if
there=92s an answer to that question or not (just as its closest
competitor Intel doesn=92t), and moves on with their plan to produce a
12-core processor to be released by late 2008. It will re****tedly be
called the Shanghai, and will be a 45nm successor to their not-so-
successful Barcelona chip.
The AMD Shanghai will supposedly come with HyperTrans****t 3.0 and six
cores so it can stand up against Intel=92s upcoming Dunnington chips in
a race towards becoming the fastest processors on Earth. And while the
six-core variety of the Shanghai isn=92t even close to coming to market,
AMD already has plans for a follow-up: a 12-core version, called
Istanbul, packing 12 cores (what else?) and HyperTrans****t 3.0
interconnect as well.
Get that? The first version of this product is already 3.0 while some
companies can=92t even get 2.0 right. That=92s what they meant with all
the numbers, right?
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http://www.electronista.com/articles/08/04/19/amd.reveals.45nm.shanghai/
AMD talks 45nm Shanghai w/12-cores, HyperTrans****t 3
AMD engineers this week said that the company plans on introducing new
12-core processors later this year. The first processors based on 45nm
Shanghai platform are due later this year and will be nearly identical
to the B3 variant of the Socket 1207 Opteron (Barcelona) ****pping
today, according to DailyTech. The processors will re****tedly use the
faster HyperTrans****t 3.0 for inter-CPU communication and will debut
later this year as a "native six-core" Shanghai derivative, currently
code-named Istanbul. That processor, the re****t claims, is "clearly
targeted at Intel's recently announced six-core, 45nm Dunnington
processor." A few months later, Shanghai and its derivatives will also
get twin-die per package treatment, allowing for up to 12-cores per
package, the re****t says.
Each of these processors will contain a dual-channel memory
controller, allowing a single-core to emulate quad-channel memory
functions by accessing the other dual-channel memory controller on the
same socket and offering an alternative to Intel's Nehalem tri-channel
memory controller, DailyTech notes.
Citing motherboard manufacturers, the re****t says that Shanghai and
its multiple-core derivatives will be backwards compatible with
existing Socket 1207 motherboards, but that processor-to-processor
communication will downgrade to lower HyperTrans****t frequencies on
older motherboards. The publication also notes that the newer 1207+
motherboards will officially sup****t the HyperTrans****t 3.0
frequencies.
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