Re: Multi-core and memory

In comp.sys.ibm.pc.hardware.chips Rui Pedro Mendes Salgueiro
<rps2@[EMAIL PROTECTED]
> wrote:
> Since even one core can saturate one memory controller, it seems to me
> that the systems are getting more and more inbalanced, and it could be
> useful to have multiple memory controllers per chip. But maybe it would
> make more sense to have wider memory instead.
>
> And I suppose for the moment it is not practical to do either thing (pin
> count, price for base configurations, other reasons ?).

Intel went to wider memory (quad channel) with the current generation
(5xxx
series) of dual socket Xeons, but that's still multiple sockets - AMD has
effectively been doing that since the Opterons came out - and that's also
only between the northbridge and memory.

Bandwidth and memory width do go up at times; Intel hasn't widened from 64
bits since the Pentium classic came out but they have upped the clock
speed
many times and gone from a regular FSB to a QDR one (which is then split
into DDR dual channel by the north bridge)

With AMD, it should be hypothetically possible to stick additional memory
controllers on the end of some of the HT links, but it would be slow
compared to memory off the onboard controller, and I don't know if
anyone's
actually done it.

-- 
Nate Edel                               http://www.cubiclehermit.com/
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