Re: Multi-core and memory

"Rui Pedro Mendes Salgueiro" <rps2@[EMAIL PROTECTED]
> wrote in message 
news:g0v24v$f8o$1@[EMAIL PROTECTED]
> Hello
>
> Would it make sense to have multiple memory interfaces in multi-core
CPUs 
> ?
> Have Intel or AMD announced plans to have such a thing ?

[...]

I have always wondered why a multi-core CPU could not be 
__directly_integrated__ into a memory card. IMHO, a 2GB mem-card should be

able to physically integrate with one or two multi-core CPU's. The memory 
which resides on the same card as the CPU(s) could be accessed using a
cache 
coherent shared memory model. If one card needs to communicate with
another, 
then a message-passing interface would be utilized. Think of a single 
desktop sized system that has 8 2GB cards with two 64-core CPU's per-card.

That's 16GB of total distributed memory running on 1024 cores...

Does anybody know of any experimental projects that are trying to
accomplish 
something even vaguely similar?

Of course, the chip vendor would need to be the memory vendor as well... 
Humm...

IMVHO, drastically reducing the physical distance between the chip and its

local memory can be very im****tant factor wrt scalability concerns. It 
should be ideal to merge the chip and a couple of GB of memory into a
single 
unit.

Intra-CPU to local memory  communication would use shared memory, and 
inter-CPU and remote memory communication would use message passing. It 
seems the scheme could be made to work... What am I missing?

With this type of setup, it seems like each card could be running a
separate 
operating system that is physically isolated from the other cards in the 
system. Their only communication medium would be message passing. OS(a) 
running on Card(a) could communicate with OS(b) running on Card(b) using 
MPI. Card(a) intra-comm could use shared memory. This sure seems like it 
would scale. Adding extra cards would not seem to be a problem. They might

even be able to be hot-swappable. Humm...

The programming model would be something like:

http://groups.google.com/group/comp.arch/msg/18dbf634f491f46b

http://groups.google.com/group/comp.arch/msg/2e5eeaecd0e69aed

Basically, intra-node communication is analogous to inter-card comms, and 
inter-node comms would be similar to inter-card comm...

Any thoughts?