Robert Myers <rbmyersusa@[EMAIL PROTECTED]
> wrote in part:
> Your constant harping on a single figure of merit is beyond tiresome.
??? you must have me confused with someone else. I do _NOT_
claim that latency is the only or even the most im****tant
factor in computing. However, I do say latency is sometimes
a critical factor and should receive attention.
> For the thousandth time, my problems tend to be memory bound.
Yours may well be. I try to look beyond the bounds of my
immediate experience and consider what others needs might be.
> As to using older architectures, that's
> clearly happening, because the modern developments don't
> really help in some situations, like transaction servers.
Precisely my point. I do not understand the DDR2 bus signals
well enough to know whether it could tolerate SRAM devices
(even with proper glue) and their short latency. Such a
development of drop-in "super-premium" memory modules would
bypass the huge hurdle of new MMUs, mobos and RAM stds.
> It's your focus on a single aspect of a very
> complicated problem that just makes me crazy.
You flatter me. I do not believe I have that power.
> For the most part, we've driven right up to that wall and
> through it without mussing a hair. It's a crazy way to
> live, but it is the way we are living: through fakery and
> bulltet-dodgin, not through brute force hardware design.
Well, I still suggest PC performance has become unbalanced
and may increasingly limited by this imbalance. Over the
past decade, CPU speeds have increased by ~15x, bandwidth by
10-16x, avg RAM by ~100x, yet latency by 2x at most.
Your predictability/prefetch solution has also weakened as cache
sizes have also not increased much. Especially L1 (prefetch dest)
while expansions in L2 have also usually resulted in slowdowns.
This becomes even more glaring as a ratio of memory/problem size.
> One final thought. The predictability problem is everywhere
> in computing. You can call it the latency problem if you
> wish, but you're always stuck trying to anticipate.
"almost all programing can be viewed as an exercise in caching"
Terje Mathison 1994.
-- Robert
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