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74LVQ573SJ datasheet and pdf
http://www.chinaicmart.com/series-74L/74LVQ573SJ.html
DESCRIPTION
The LVQ573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE
OUTPUT NON INVERTING fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology. It is ideal for low power
and low noise 3.3V applications.
These 8 bit D-Type flip-flops are controlled by a latch enable input
(LE) and an output enable input (OE).
While the LE input is held at a high level, the Q outputs will follow
the data input precisely.
When the LE is taken low, the Q outputs will be latched precisely at
the logic level of D input data. While the (OE) input is low, the 8
outputs will be in a normal logic state (high or low logic level) and
while high level the outputs will be in a high impedance state.
It has better speed performance at 3.3V than 5V LSTTL family combined
with the true CMOS low power consumption.
All inputs and outputs are equipped with protection circuits against
static discharge, giving them 2KV ESD immunity and transient excess
voltage.
