Capacitvely-loaded source follower

I'm looking at problem 7, chapter 9 of T. Lee "The Design of CMOS 
Radio-frequency integrated circuits" regarding the input impedance of a 
capacitively-loaded source follower.  Cgd and rg are assumed zero.  DC 
biasing of the source is a constant-current sink so doesn't feature in the

AC analysis.  There is only Cgs and load capacitance CL.  It asks over
what 
range of load capacitance the real part of the input impedance is
negative? 
Is this a trick question?  I think it is for all CL:

Vg = Vgs + Vs

Vg =   Ig       (Ig + gm.Vgs)
     ------  +  -------------
     jw.Cgs         jw.CL


Vg =   Ig         1              Ig
     ------  +  ----- (Ig + gm.------)
     jw.Cgs     jw.CL          jw.Cgs


Vg   jw.CL + jw.Cgs + gm
-- = -------------------
Ig      jw.CL . jw.Cgs


Vg   -gm - jw(Cgs+CL)
-- = ----------------
Ig    w^2 . Cgs . CL


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